In this research work we present a reconfigurable platform\udthat implements all the digital processing and RF carrier\udgeneration for the class S Power Amplifier proposed\udby the Institute of Microelectronics and Wireless Systems.\udThis amplifier is a combination of a lowpass or bandpass\udsigma-delta modulation stage in series with a frequency\udshifting stage and a switch mode amplifier followed by a\udband pass filter. The reconfigurable platform is parameterizable, scalable and it has been optimized for reconfigurable devices. It takes advantage from the Multi-Gigabit serial links embedded into the new FPGAs to synthesize binary RF signals, and from the parameterizable soft cores that the FPGA vendor provides. The implementation results for a stand-alone and for a tiny Wishbone compatible Systemon-Programmable-Chip versions are presented. The design is validated with data measured in the simulation and in the prototype.
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